Synchronous Dynamic Random Access Memory (SDRAM) has been developed to reduce or avoid time delays caused by access time and cycle time of slower conventional Dynamic Random Access Memory (DRAM). SDRAMs take in external signals in synchronization with an externally applied clock signal which allows precise cycle control and input/output transactions on every clock cycle. However, SDRAMs require initialization before any operational use can be made of the SDRAM. If SDRAMs are not correctly initialized, the SDRAMs will not function properly. Current systems which initialize SDRAM typically assume that proper initialization has occurred and proceed to operational use of the SDRAM without verification that a memory controller has been properly programmed.